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? semiconductor components industries, llc, 2006 october, 2006 ? rev. 11 1 publication order number: mc33272a/d mc33272a, mc33274a, NCV33272A, ncv33274a single supply, high slew rate, low input offset voltage operational amplifiers the mc33272/74 series of monolithic operational amplifiers are quality fabricated with innovative bipolar design concepts. this dual and quad operational amplifier series incorporates bipolar inputs along with a patented zip ? r ? trim element for input offset voltage reduction. the mc33272/74 series of operational amplifiers exhibits low input offset voltage and high gain bandwidth product. dual ? doublet frequency compensation is used to increase the slew rate while maintaining low input noise characteristics. its all npn output stage exhibits no deadband crossover distortion, large output voltage swing, and an excellent phase and gain margin. it also provides a low open loop high frequency output impedance with symmetrical source and sink ac frequency performance. features ? input offset voltage trimmed to 100 v (typ) ? low input bias current: 300 na ? low input offset current: 3.0 na ? high input resistance: 16 m ? low noise: 18 nv/ hz @ 1.0 khz ? high gain bandwidth product: 24 mhz @ 100 khz ? high slew rate: 10 v/ s ? power bandwidth: 160 khz ? excellent frequency stability ? unity gain stable: w/capacitance loads to 500 pf ? large output voltage swing: +14.1 v/ ? 14.6 v ? low total harmonic distortion: 0.003% ? power supply drain current: 2.15 ma per amplifier ? single or split supply operation: +3.0 v to +36 v or 1.5 v to 18 v ? esd diodes provide added protection to the inputs ? pb ? free packages are available ? ncv prefix for automotive and other applications requiring site and control changes pdip ? 8 p suffix case 626 soic ? 8 d suffix case 751 marking diagrams dual quad pdip ? 14 p suffix case 646 14 soic ? 14 d suffix case 751a 1 1 8 mc33272ap awl yywwg 33272 alywx 1 14 mc33274ap awlyywwg 1 8 1 8 1 14 see detailed ordering and shipping information in the package dimensions sect ion on page 11 of this data sheet. ordering information http://onsemi.com 1 8 mc33274adg awlyww 1 14 ncv33274adg awlyww 1 14 x = a for mc33272ad/dr2 = n for NCV33272Adr2 a = assembly location wl, l = wafer lot yy, y = year ww, w = work week g or = pb ? free package ncv3 3274 alyw 1 14 1 14 tssop ? 14 dtb suffix case 948g (note: microdot may be in either location)
mc33272a, mc33274a, NCV33272A, ncv33274a http://onsemi.com 2 pin connections case 626/751 dual case 646/751a/948g quad (top view) v ee inputs 1 inputs 2 output 2 output 1 v cc ? ? + + 1 2 3 4 8 7 6 5 inputs 1 output 1 v cc inputs 2 output 2 output 4 inputs 4 v ee inputs 3 output 3 (top view) 4 23 1 1 2 3 4 5 6 78 9 10 11 12 13 14 + + ? ? + ? + ? maximum ratings rating symbol value unit supply voltage v cc to v ee +36 v input differential voltage range v idr note 1 v input voltage range v ir note 1 v output short circuit duration (note 2) t sc indefinite sec maximum junction temperature t j +150 c storage temperature t stg ? 60 to +150 c esd protection at any pin ? human body model ? machine model v esd 2000 200 v maximum power dissipation p d note 2 mw operating temperature range mc33272a, mc33274a NCV33272A, ncv33274a t a ? 40 to +85 ? 40 to +125 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. either or both input voltages should not exceed v cc or v ee . 2. power dissipation must be considered to ensure maximum junction temperature (t j ) is not exceeded (see figure 2).
mc33272a, mc33274a, NCV33272A, ncv33274a http://onsemi.com 3 dc electrical characteristics (v cc = +15 v, v ee = ? 15 v, t a = 25 c, unless otherwise noted.) characteristics figure symbol min typ max unit input offset voltage (r s = 10 , v cm = 0 v, v o = 0 v) (v cc = +15 v, v ee = ? 15 v) t a = +25 c t a = ? 40 to +85 c t a = ? 40 to +125 c (NCV33272A) t a = ? 40 to +125 c (ncv33274a) (v cc = 5.0 v, v ee = 0) t a = +25 c 3 |v io | ? ? ? ? ? 0.1 ? ? ? ? 1.0 1.8 2.5 3.5 2.0 mv average temperature coefficient of input offset voltage r s = 10 , v cm = 0 v, v o = 0 v, t a = ? 40 to +125 c 3 v io / t ? 2.0 ? v/ c input bias current (v cm = 0 v, v o = 0 v) t a = +25 c t a = t low to t high 4, 5 i ib ? ? 300 ? 650 800 na input offset current (v cm = 0 v, v o = 0 v) t a = +25 c t a = t low to t high |i io | ? ? 3.0 ? 65 80 na common mode input voltage range ( v io = 5.0 mv, v o = 0 v) t a = +25 c 6 v icr v ee to (v cc ? 1.8) v large signal voltage gain (v o = 0 v to 10 v, r l = 2.0 k ) t a = +25 c t a = t low to t high 7 a vol 90 86 100 ? ? ? db output voltage swing (v id = 1.0 v) (v cc = +15 v, v ee = ? 15 v) r l = 2.0 k r l = 2.0 k r l = 10 k r l = 10 k (v cc = 5.0 v, v ee = 0 v) r l = 2.0 k r l = 2.0 k 8, 9, 12 10, 11 v o + v o ? v o + v o ? v ol v oh 13.4 ? 13.4 ? ? 3.7 13.9 ? 13.9 14 ? 14.7 ? ? ? ? 13.5 ? ? 14.1 0.2 5.0 v common mode rejection (v in = +13.2 v to ? 15 v) 13 cmr 80 100 ? db power supply rejection v cc /v ee = +15 v/ ? 15 v, +5.0 v/ ? 15 v, +15 v/ ? 5.0 v 14, 15 psr 80 105 ? db output short circuit current (v id = 1.0 v, output to ground) source sink 16 i sc +25 ? 25 +37 ? 37 ? ? ma power supply current per amplifier (v o = 0 v) (v cc = +15 v, v ee = ? 15 v) t a = +25 c t a = t low to t high (v cc = 5.0 v, v ee = 0 v) t a = +25 c 17 i cc ? ? ? 2.15 ? ? 2.75 3.0 2.75 ma 3. mc33272a, mc33274a t low = ? 40 ct high = +85 c NCV33272A, ncv33274a t low = ? 40 ct high = +125 c
mc33272a, mc33274a, NCV33272A, ncv33274a http://onsemi.com 4 ac electrical characteristics (v cc = +15 v, v ee = ? 15 v, t a = 25 c, unless otherwise noted.) characteristics figure symbol min typ max unit slew rate (v in = ? 10 v to +10 v, r l = 2.0 k , c l = 100 pf, a v = +1.0 v) 18, 33 sr 8.0 10 ? v/ s gain bandwidth product (f = 100 khz) 19 gbw 17 24 ? mhz ac voltage gain (r l = 2.0 k , v o = 0 v, f = 20 khz) 20, 21, 22 a vo ? 65 ? db unity gain bandwidth (open loop) bw ? 5.5 ? mhz gain margin (r l = 2.0 k , c l = 0 pf) 23, 24, 26 a m ? 12 ? db phase margin (r l = 2.0 k , c l = 0 pf) 23, 25, 26 m ? 55 ? deg channel separation (f = 20 hz to 20 khz) 27 cs ? ? 120 ? db power bandwidth (v o = 20 v pp, r l = 2.0 k , thd 1.0%) bw p ? 160 ? khz total harmonic distortion (r l = 2.0 k , f = 20 hz to 20 khz, v o = 3.0 v rms , a v = +1.0) 28 thd ? 0.003 ? % open loop output impedance (v o = 0 v, f = 6.0 mhz) 29 |z o | ? 35 ? differential input resistance (v cm = 0 v) r in ? 16 ? m differential input capacitance (v cm = 0 v) c in ? 3.0 ? pf equivalent input noise voltage (r s = 100 , f = 1.0 khz) 30 e n ? 18 ? nv/ hz equivalent input noise current (f = 1.0 khz) 31 i n ? 0.5 ? pa/ hz v in ? sections bcd v ee + v in v o v cc + + figure 1. equivalent circuit schematic (each amplifier)
mc33272a, mc33274a, NCV33272A, ncv33274a http://onsemi.com 5 2 figure 2. maximum power dissipation versus temperature figure 3. input offset voltage versus temperature for typical units figure 4. input bias current versus common mode voltage figure 5. input bias current versus temperature figure 6. input common mode voltage range versus temperature figure 7. open loop voltage gain versus temperature p(max), maximum power dissipation (mw) d t a , ambient temperature ( c) 0 20 40 60 80 100 120 140 160 180 ?60 ?40 ?20 mc33272p & mc33274p mc33274d mc33272d v, input offset voltage (mv) io t a , ambient temperature ( c) ?55 ?25 0 25 50 75 100 125 v cc = +15 v v ee = ?15 v v cm = 0 v 1. v io > 0 @ 25 c 2. v io = 0 @ 25 c 3. v io < 0 @ 25 c 1 3 2 1 3 i , input bias current (na) ib v cm , common mode voltage (v) ?16 ?12 ?8.0 ?4.0 0 4.0 8.0 12 16 v cc = +15 v v ee = ?15 v t a = 25 c t a , ambient temperature ( c) ?55 ?25 0 25 50 75 100 125 v cc = +15 v v ee = ?15 v v cm = 0 v t a , ambient temperature ( c) v, input common mode voltage range (v) icr ?55 ?25 0 25 50 75 100 125 v ee v cc v cc = +5.0 v to +18 v v ee = ?5.0 v to ?18 v v io = 5.0 mv v o = 0 v t a , ambient temperature ( c) a, open loop voltage gain (x 1.0 kv/v) vol ?55 ?25 0 25 50 75 100 125 v cc = +15 v v ee = ?15 v r l = 2.0 k f = 10 hz v o = ?10 v to +10 v i , input bias current (na) ib 2400 2000 1600 1200 800 400 0 5.0 3.0 1.0 ?1.0 ?3.0 ?5.0 400 350 300 250 200 150 100 50 0 600 500 400 300 200 100 0 v cc v cc ?0.5 v cc ?1.0 v cc ?1.5 v cc ?2.0 v ee +1.0 v ee +0.5 v ee 180 160 140 120 100
mc33272a, mc33274a, NCV33272A, ncv33274a http://onsemi.com 6 v o , output voltage (v ) pp v o , output voltage (v ) pp t a = 55 c t a = 125 c t a = 25 c t a = 25 c t a = ?55 c t a = 125 c v cc = +15 v r l to v cc v ee = gnd r fdbk = 100 k figure 8. split supply output voltage swing versus supply voltage figure 9. split supply output saturation voltage versus load current figure 10. single supply output saturation voltage versus load resistance to ground figure 11. single supply output saturation voltage versus load resistance to v cc figure 12. output voltage versus frequency figure 13. common mode rejection versus frequency 0 5.0 10 15 20 v cc , v ee supply voltage (v) t a = 25 c r l = 10 k r l = 2.0 k 5.0 10 15 20 0 i l , load current ( ma) , output saturation voltage (v ) sat source t a = 125 c t a = 25 c t a = ?55 c 100 1.0 k 10 k 100 k 1.0 m r l , load resistance to ground (k ) v cc v cc = +5.0 v to +18 v r l to gnd v ee = gnd t a = 55 c t a = 125 c t a = +25 c t a = ?55 c gnd t a = 125 c 10 100 1.0 k 100 k r l , load resistance to v cc ( ) 1.0 k 10 k 1.0 m 1 0m 100 k f, frequency (hz) v cc = +15 v v ee = ?15 v r l = 2.0 k a v = +1.0 thd = 1.0% t a = 25 c f, frequency (hz) 10 100 1.0 k 10 k 100 k 1.0 m cmr, common mode rejection (db) t a = ?55 c t a = 125 c v cc = +15 v v ee = ?15 v v cm = 0 v v cm = 1.5 v v cc = +5.0 v to +18 v v ee = ?5.0 v to ?18 v 10 k sink t a = 125 c t a = 25 c t a = ?55 c v , output saturation voltage (v) sat v , output saturation voltage (v) sat v cmr = 20log a dm ? + v cm v o x a dm v cm v o 40 30 20 10 0 v cc v cc ?1.0 v cc ?2.0 v ee +2.0 v ee +1.0 v ee v cc v cc ?4.0 v cc ?8.0 v cc ?12 +0.2 +0.1 0 15 14.6 14.2 8.0 4.0 0 28 24 20 16 12 8 4 0 120 100 80 60 40 20 0
mc33272a, mc33274a, NCV33272A, ncv33274a http://onsemi.com 7 t a = 125 c v cc = +15 v v ee = ?15 v v cc = 1.5 v t a = ?55 c v cc v ee a dm ? + +psr = 20log v o v o /a dm v cc figure 14. positive power supply rejection versus frequency figure 15. negative power supply rejection versus frequency figure 16. output short circuit current versus temperature figure 17. supply current versus supply voltage figure 18. normalized slew rate versus temperature figure 19. gain bandwidth product versus temperature f, frequency (hz) +psr, power supply rejection (db) 120 100 80 60 40 20 0 10 100 1.0 k 10 k 100 k 1 .0 m f, frequency (hz) ?psr, power supply rejection (db) 120 100 80 60 40 20 0 10 100 1.0 k 10 k 100 k 1.0 m t a = 125 c v cc = 1.5 v v cc = +15 v v ee = ?15 v t a = ?55 c t a , ambient temperature ( c) |i|, output short circuit current (ma) sc 60 50 40 30 20 10 0 ?55 ?25 0 25 50 75 100 125 source sink sink source v cc = +15 v v ee = ?15 v v id = 1.0 v r l < 100 v cc , |v ee | , supply voltage (v) i, supply current (ma) cc 11 10 9.0 8.0 7.0 6.0 5.0 4.0 3.0 0 2.0 4.0 6.0 8.0 10 12 14 16 18 20 t a = +125 c t a = +25 c t a = ?55 c t a , ambient temperature ( c) sr, slew rate (normalized) 1.15 1.1 1.05 1.0 0.95 0.9 0.85 ?55 ?25 0 25 50 75 100 125 v cc = +15 v v ee = ?15 v v in = 20 v t a , ambient temperature ( c) gbw, gain bandwidth product (mhz) 50 40 30 20 10 0 ?55 ?25 0 25 50 75 100 125 v cc = +15 v v ee = ?15 v f = 100 khz r l = 2.0 k c l = 0 pf v cc v ee a dm ? + ?psr = 20log v o v o /a dm v ee v o 100 pf 2.0k v in ? +
mc33272a, mc33274a, NCV33272A, ncv33274a http://onsemi.com 8 c l = 10 pf c l = 100 pf c l = 300 pf c l = 500 pf v cc = +15 v v ee = ?15 v 1a 2a 2b 1b figure 20. voltage gain and phase versus frequency figure 21. gain and phase versus frequency figure 22. open loop voltage gain and phase versus frequency figure 23. open loop gain margin and phase margin versus output load capacitance figure 24. open loop gain margin versus temperature figure 25. phase margin versus temperature f, frequency (hz) excess phase (degrees) , a , voltage gain (db) v 25 20 15 10 5.0 0 ?10 ?15 ?20 ?25 ?5.0 100 k 1.0 m 10 m 100 m gain phase v cc = +15 v v ee = ?15 v r l = 2.0 k t a = 25 c f, frequency (hz) phase (degrees) , a , voltage gain (db) v 25 20 15 10 5.0 0 ?10 ?15 ?20 ?25 ?5.0 100 k 1.0 m 10 m 100 m t a = 25 c c l = 0 pf 1a ? phase v cc = 18 v, v ee = ?18 v 2a ? phase v cc = 1.5 v, v ee = ?1.5 v 1b ? gain v cc = 18 v, v ee = ?18 v 2b ? gain v cc = 1.5 v, v ee = ?1.5 v 1a 2a 1b 2b f, frequency (mhz) vol excess phase (degrees) 20 10 0 ?10 a, open loop voltage gain (db) ?20 ?30 3.0 4.0 6.0 8.0 10 20 30 v cc = +15 v v ee = ?15 v v out = 0 v t a = 25 c 1a ? phase (r l = 2.0 k ) 2a ? phase (r l = 2.0 k , c l = 300 pf) 1b ? gain (r l = 2.0 k ) 2b ? gain (r l = 2.0 k , c l = 300 pf) m c l , output load capacitance (pf) a, open loop gain margin (db) 12 10 8.0 6.0 4.0 2.0 0 1.0 10 100 1000 , phase margin (degrees) m v in ? + v o c l 2.0 k gain margin phase margin v cc = +15 v v ee = ?15 v v o = 0 v t a , ambient temperature ( c) a, open loop gain margin (db) m 12 10 8.0 6.0 4.0 2.0 0 ?55 ?25 0 25 50 75 100 125 t a , ambient temperature ( c) m 60 50 40 30 20 10 0 ?55 ?25 0 25 50 75 100 125 , phase margin (degrees) c l = 10 pf c l = 100 pf c l = 300 pf c l = 500 pf v cc = +15 v v ee = ?15 v 80 100 120 140 160 180 200 220 240 260 280 80 100 120 140 160 180 200 220 240 100 120 140 160 180 200 220 240 280 260 0 10 20 30 40 50
mc33272a, mc33274a, NCV33272A, ncv33274a http://onsemi.com 9 figure 26. phase margin and gain margin versus differential source resistance figure 27. channel separation versus frequency figure 28. total harmonic distortion versus frequency figure 29. output impedance versus frequency figure 30. input referred noise voltage versus frequency figure 31. input referred noise current versus frequency a, gain margin (db) m r t , differential source resistance ( ) 15 12 9.0 6.0 3.0 0 1.0 10 100 1.0 k 10 k m , phase margin (degrees) gain margin phase margin f, frequency (hz) cs, channel seperation (db) 160 150 140 130 120 110 100 100 1.0 k 10 k 100 k 1.0 m driver channel v cc = +15 v v ee = ?15 v r l = 2.0 k v od = 20 v pp t a = 25 c f, frequency (hz) thd, total harmonic distortion (%) 1.0 0.1 0.01 0.001 10 100 1.0 k 10 k 100 k a v = +1000 a v = +100 a v = +10 a v = +1.0 v o = 2.0 v pp t a = 25 c v cc = +15 v v ee = ?15 v f, frequency (hz) |z|, output impedance () o 50 40 30 10 0 20 10 k 100 k 1.0 m 10 m v cc = +15 v v ee = ?15 v v o = 0 v t a = 25 c a v = 1000 a v = 100 a v = 10 a v = 1.0 f, frequency (hz) e, input referred noise voltage ( ) n 50 40 30 20 10 0 10 100 1.0 k 10 k 100 k nv/ hz v cc = +15 v v ee = ?15 v t a = 25 c pa/ hz i, input referred noise current ( ) 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 f, frequency (hz) 10 100 1.0 k 10 k 100 k v cc = +15 v v ee = ?15 v t a = 25 c n 60 50 40 30 20 10 0 v in r 2 r 1 v o ? + input noise voltage test circuit v o ? + input noise current circuit r s (r s = 10 k v o ? + v cc = +15 v v ee = ?15 v r t = r 1 +r 2 v o = 0 v t a = 25 c
mc33272a, mc33274a, NCV33272A, ncv33274a http://onsemi.com 10 figure 32. percent overshoot versus load capacitance figure 33. non ? inverting amplifier slew rate for the mc33274 figure 34. non ? inverting amplifier overshoot for the mc33274 figure 35. small signal transient response for mc33274 figure 36. large signal transient response for mc33274 c l , load capacitance (pf) percent overshoot (%) 60 50 40 30 20 10 0 10 100 1000 v cc = +15 v v ee = ?15 v r l = 2.0 k t a = 25 c t, time (2.0 s/div) t, time (1.0 s/div) t, time (2.0 s/div) v, output voltage (5.0 v/div) o t, time (2.0 ns/div) v cc = +15 v v ee = ?15 v a v = +1.0 r l = 2.0 k t a = 25 c c l = 100 pf c l = v cc = +15 v v ee = ?15 v a v = +1.0 r l = 2.0 k c l = 100 pf t a = 25 c v cc = +15 v v ee = ?15 v a v = +1.0 r l = 2.0 k c l = 300 pf t a = 25 c v cc = +15 v v ee = ?15 v a v = +1.0 r l = 2.0 k c l = 300 pf t a = 25 c v, output voltage (5.0 v/div) o v, output voltage (50 mv/div) o v, output voltage (5.0 v/div) o
mc33272a, mc33274a, NCV33272A, ncv33274a http://onsemi.com 11 ordering information device package shipping ? mc33272ad soic ? 8 98 units / rail mc33272adg soic ? 8 (pb ? free) mc33272adr2 soic ? 8 2500 / tape & reel mc33272adr2g soic ? 8 (pb ? free) mc33272ap pdip ? 8 50 units / rail mc33272apg pdip ? 8 (pb ? free) NCV33272Adr2* soic ? 8 2500 / tape & reel NCV33272Adr2g* soic ? 8 (pb ? free) mc33274ad soic ? 14 55 units / rail mc33274adg soic ? 14 (pb ? free) mc33274adr2 soic ? 14 2500 / tape & reel mc33274adr2g soic ? 14 (pb ? free) mc33274ap pdip ? 14 25 units / rail mc33274apg pdip ? 14 (pb ? free) ncv33274ad* soic ? 14 55 units / rail ncv33274adg* soic ? 14 (pb ? free) ncv33274adr2* soic ? 14 2500 / tape & reel ncv33274adr2g* soic ? 14 (pb ? free) ncv33274adtbr2g* tssop ? 14 (pb ? free) ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. *ncv prefix for automotive and other applications requiring site and control changes.
mc33272a, mc33274a, NCV33272A, ncv33274a http://onsemi.com 12 package dimensions soic ? 8 nb case 751 ? 07 issue ah seating plane 1 4 5 8 n j x 45 k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 6. 751 ? 01 thru 751 ? 06 are obsolete. new standard is 751 ? 07. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 ? x ? ? y ? g m y m 0.25 (0.010) ? z ? y m 0.25 (0.010) z s x s m 1.52 0.060 7.0 0.275 0.6 0.024 1.270 0.050 4.0 0.155 mm inches scale 6:1 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint*
mc33272a, mc33274a, NCV33272A, ncv33274a http://onsemi.com 13 package dimensions pdip ? 14 case 646 ? 06 issue p 17 14 8 b a dim min max min max millimeters inches a 0.715 0.770 18.16 19.56 b 0.240 0.260 6.10 6.60 c 0.145 0.185 3.69 4.69 d 0.015 0.021 0.38 0.53 f 0.040 0.070 1.02 1.78 g 0.100 bsc 2.54 bsc h 0.052 0.095 1.32 2.41 j 0.008 0.015 0.20 0.38 k 0.115 0.135 2.92 3.43 l m ??? 10 ??? 10 n 0.015 0.039 0.38 1.01 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of leads when formed parallel. 4. dimension b does not include mold flash. 5. rounded corners optional. f hg d k c seating plane n ? t ? 14 pl m 0.13 (0.005) l m j 0.290 0.310 7.37 7.87
mc33272a, mc33274a, NCV33272A, ncv33274a http://onsemi.com 14 tssop ? 14 case 948g ? 01 issue b dim min max min max inches millimeters a 4.90 5.10 0.193 0.200 b 4.30 4.50 0.169 0.177 c ??? 1.20 ??? 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.50 0.60 0.020 0.024 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash, protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane ? w ? . s u 0.15 (0.006) t 2x l/2 s u m 0.10 (0.004) v s t l ? u ? seating plane 0.10 (0.004) ? t ? ??? ??? section n ? n detail e j j1 k k1 ? w ? 0.25 (0.010) 8 14 7 1 pin 1 ident. h g a d c b s u 0.15 (0.006) t ? v ? 14x ref k n n 7.06 14x 0.36 14x 1.26 0.65 dimensions: millimeters 1 pitch soldering footprint* *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d.
mc33272a, mc33274a, NCV33272A, ncv33274a http://onsemi.com 15 package dimensions soic ? 14 case 751a ? 03 issue h notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. ? a ? ? b ? g p 7 pl 14 8 7 1 m 0.25 (0.010) b m s b m 0.25 (0.010) a s t ? t ? f r x 45 seating plane d 14 pl k c j m dim min max min max inches millimeters a 8.55 8.75 0.337 0.344 b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.054 0.068 d 0.35 0.49 0.014 0.019 f 0.40 1.25 0.016 0.049 g 1.27 bsc 0.050 bsc j 0.19 0.25 0.008 0.009 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 5.80 6.20 0.228 0.244 r 0.25 0.50 0.010 0.019 7.04 14x 0.58 14x 1.52 1.27 dimensions: millimeters 1 pitch soldering footprint* 7x *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d.
mc33272a, mc33274a, NCV33272A, ncv33274a http://onsemi.com 16 package dimensions pdip ? 8 p suffix case 626 ? 05 issue l notes: 1. dimension l to center of lead when formed parallel. 2. package contour optional (round or square corners). 3. dimensioning and tolerancing per ansi y14.5m, 1982. 14 5 8 f note 2 ? a ? ? b ? ? t ? seating plane h j g d k n c l m m a m 0.13 (0.005) b m t dim min max min max inches millimeters a 9.40 10.16 0.370 0.400 b 6.10 6.60 0.240 0.260 c 3.94 4.45 0.155 0.175 d 0.38 0.51 0.015 0.020 f 1.02 1.78 0.040 0.070 g 2.54 bsc 0.100 bsc h 0.76 1.27 0.030 0.050 j 0.20 0.30 0.008 0.012 k 2.92 3.43 0.115 0.135 l 7.62 bsc 0.300 bsc m ??? 10 ??? 10 n 0.76 1.01 0.030 0.040 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 mc33272a/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative

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